Hi, All - I guess I have been asleep on compilation units for some time. I did not realize that the default for compilation units was that each file compiled (even in a list of files on the command line) was considered a separate compilation unit. Question - Could somebody tell me why this was chosen as the default (instead of defining all files compiled at the same time to make up a compilation unit?) Until just recently all tools considered typedefs at the $root level to be part of the compilation unit if the definitions were compiled with other files on the command line. This just changed in one vendor's tool and as I have talked to customers, they have called this a bug (turns out the new behavior is what is specified) The problem with the current spec is that this default condition is defined in the 10th paragraph of the section, while the first four paragraphs seem to indicate that all files compiled at the same time make up a compilation unit. Paragraphs 5-7 indicate vendor choice of (1) all files make a compilation unit or (2) each file is a separate compile unit (again the ordering that seems to show top-billing to (1) all files and secondary billing to (2) each file. Look at the proposed P1800 text - I suggest a re-ordering of paragraphs at the end without changing any of the text or default behavior. CURRENT P1800 Ballot Document 19.3 Compilation unit support SystemVerilog supports separate compilation using compiled units. The following terms and definitions are provided: compilation unit: a collection of one or more SystemVerilog source files compiled together compilation-unit scope: a scope that is local to the compilation unit. It contains all declarations that lie outside of any other scope $unit: the name used to explicitly access the identifiers in the compilation-unit scope The exact mechanism for defining which files constitute a compilation unit is tool specific. However, compliant implementations shall have the same default behavior, and tools shall provide use models that allow both of the following cases: 1) All files on a given compilation command line make a single compilation unit (in which case the declarations within those files are accessible anywhere else within the constructs defined within those files). 2) Each file is a separate compilation unit (in which case the declarations in each compilation-unit scope are accessible only within its corresponding file). The contents of files included using one or more ‘include directives become part of the compilation unit of the file they are included within. If there is a declaration that is incomplete at the end of a file, then the compilation unit including that file will extend through each successive file until there are no incomplete declarations at the end of the group of files. The default definition of a compilation unit is defined in case 2) above, in which each file is a separate compilation unit. ----------------------------------- PROPOSED reordering of text for P1800 Ballot Document (even though this puts the exact definition of terms after they are initially used in the section, I believe it is more important to specify the default behavior at the top of the section and I don't think there is confusion in the terminology). 19.3 Compilation unit support SystemVerilog supports separate compilation using compiled units. The exact mechanism for defining which files constitute a compilation unit is tool specific. However, compliant implementations shall have the same default behavior, and tools shall provide use models that allow both of the following cases: 1) Each file is a separate compilation unit (in which case the declarations in each compilation-unit scope are accessible only within its corresponding file). 2) All files on a given compilation command line make a single compilation unit (in which case the declarations within those files are accessible anywhere else within the constructs defined within those files). The default definition of a compilation unit is defined in case 1) above, in which each file is a separate compilation unit. The following terms and definitions are provided: compilation unit: a collection of one or more SystemVerilog source files compiled together compilation-unit scope: a scope that is local to the compilation unit. It contains all declarations that lie outside of any other scope $unit: the name used to explicitly access the identifiers in the compilation-unit scope The contents of files included using one or more ‘include directives become part of the compilation unit of the file they are included within. If there is a declaration that is incomplete at the end of a file, then the compilation unit including that file will extend through each successive file until there are no incomplete declarations at the end of the group of files. Regards - Cliff ---------------------------------------------------- Cliff Cummings - Sunburst Design, Inc. 14314 SW Allen Blvd., PMB 501, Beaverton, OR 97005 Phone: 503-641-8446 / FAX: 503-641-8486 cliffc@sunburst-design.com / www.sunburst-design.com Expert Verilog, SystemVerilog, Synthesis and Verification TrainingReceived on Tue Jun 28 22:27:07 2005
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