Re: [sv-bc] Is an unnamed block with declarations a scope?

>I'd like to get people's input as to the interpretation of an
>unnamed block being a scope.

I raised issues in committee with declaring data in unnamed blocks.
The response was essentially "It isn't a big deal since the compiler
can just automatically generate a name for a block containing any
declarations, and then it is the same as a named block."  I dropped
the issues on the understanding that that would be the interpretation.

I believe I may have suggested standardizing the generated names for
these blocks, to get consistency between tools, as we did for unnamed
generate blocks in Verilog-2005.  However, this was not done.

<Example deleted...>

>Question 1: is this also illegal under P1800?

Yes, I would say so.

>Question 2: if I change the first initial block to be:
>      initial begin
>          reg x;
>          begin:A
>             $display("hello");
>          end
>      end
>
>What is the scoping of the name "A"?  Is it hidden inside
>an unnamed scope or is just the name "x" hidden since it
>is the only data declaration?

Based on the interpretation that this makes the unnamed block into
an "unnamed" scope, the name "A" would be hidden, and this becomes
legal.

>If "A" is in an unnamed scope in the second example and is in the
>module scope with the original example, does this imply that an
>unnamed block changes from not being a scope to being a scope
>when you have a declaration present?

Yes, I believe so.

>Strictly reading the LRM, only a "data declaration" is hidden.
>What happens to types?

This is a typical error for the LRM, only mentioning the most obvious
case rather than the general case.  For consistency, if this creates
a scope, then all declarations should treat it as a scope.

>Given the grammar rule:
>     seq_block ::=
>         begin [ : block_identifier ]
>            { block_item_declaration }
>            { statement_or_null }
>         end [ : block_identifier ]
>
>from the LRM, one option is that unnamed blocks whose
>"block_item_declaration" list is empty are not scopes while
>those whose "block_item_declaration" list is non-empty are
>scopes.

Yes, this was my understanding.

>The implication here is that nested named blocks are not
>hierarchically referencable if they are in an unnamed block
>with block_item_declaration items but are otherwise.  This
>preserves 1364 visibility but does mean that adding a
>simple data declaration in an unnamed block can impact
>visibility of nested named blocks.

Yes, that would be the price.  If you want to have hierarchical
references to objects in named blocks, you should avoid declaring
anything in unnamed blocks.  Anyone who doesn't care about using
hierarchical references to such local declarations can dispense
with naming their blocks.  Pick one design style and don't try
to mix them.

>Another option would be to say that for unnamed blocks
>only the "block_item_declaration" items are hidden;
>statement labels and/or nested block names in the
>statement would exist in the nearest upwards named scope.
>This causes an irregularity in the handling of the names
>that is very counter intuitive.

Yes, that would be nasty.


Steven Sharp
sharp@cadence.com