Re: [sv-bc] Parameter value assignment as context (8.13)

I'd forgotten about still open ETF 487 (almost two years ago)

   http://boydtechinc.com/etf/archive/etf_2003/1997.html

but that must be the ultimate source of the example.  I'm OK with
your interpretation of "explicit type", but if there was consensus back
then, it's too bad the Verilog-2005 standard was not updated to
clarify the issue.

>This was discussed in ETF #487.

>But maybe you already know that, since you seem to have used the same
example >which appears there...

-- Brad