Re: [sv-bc] Named blocks conflicts with existing identifiers

I think that the correct behavior is for the reference
in the "for" to bind to the $unit parameter.  The
reason is that the name "IO_SECONDARY_RO_INSTANCES"
in the module doesn't exist at the time that the reference
is made.  This falls into the normally expected definition
before use rules.

In the given case, moving the parameter definition inside the
module yields an error since there is now a name conflict in
the module.

A similar example is as follows:

integer x;

module top ();
   wire [31:0] y = x;
   integer x ;

   initial begin
      x = 6;
      #0 $display (x,,y,,$unit::x);
      $unit::x = 7;
      #0 $display (x,,y,,$unit::x);
   end

endmodule


In this case the continuous assign to y is based on $unit::x so
the $displays produce
            6          x           x
            6          7           7
respectively.


Gord.


Feldman, Yulik wrote:
> Hi,
> 
>  
> 
> What do you think should be the behavior of the example below? To what 
> declaration the expression in red should be bound? It looks that it 
> should be bound to the named block inside and eventually result in an error.
> 
>  
> 
> parameter IO_SECONDARY_RO_INSTANCES   = 1;
> 
> module ptpcioregs ();
> 
> genvar i;
> 
> generate
> 
> for (i = 0; i < IO_SECONDARY_RO_INSTANCES; i++) begin :  
> IO_SECONDARY_RO_INSTANCES
> 
> end
> 
> endgenerate
> 
> endmodule
> 
>  
> 
> Can somebody confirm that, please? Shalom told me that he remembers 
> something similar that was discussed on sv-bc, but he is unsure about 
> the outcome of that discussion.
> 
>  
> 
> --Yulik.
> 

-- 
--------------------------------------------------------------------
Gordon Vreugdenhil                                503-685-0808
Model Technology (Mentor Graphics)                gordonv@model.com