Here are my comments and classifications of the issues that were in my review buckets. 1172, major, high Issue: 15.1, 15.6, A.7.5.3: scalar_timing_check_expressions has redundancies Comment: Various simulators have different interpretations in the presence of X and Z values. 1173, (enhancement), feature, normal Issue: variable width floating point in Verilog 200X 1174, (enhancement), minor, high Issue: Allow instance array connected to data array Comment: This is a pretty natural enhancement. It should probably address multidimensional cases as well as various edge conditions involving size mismatches. 1175, (enhancement), feature, normal Issue: Add field widths to print formats Comment: I doubt there will be anything contentious in this enhancment, but a full proposal is needed. 1176, (enhancement), feature, immediate Issue: Proposal for Extending Verilog Data Types Comment: I think this should be closed as addressed by P1800 and any remaining enhancements be filed as a new request. 1179, (enhancement), text, low Issue: Add Quick Reference Comment: I'm not sure this belongs in an LRM. 1180-1188: (enhancement), feature, low Comment: This entire set is Verilog-AMS integration related. All of this should be addressed during the main Verilog-AMS integration. 1264, major, normal Issue: 8.13.1,2: "default:value" description unclear Comment: This is related to Mantis 1265 1265, (clarification), minor, normal Issue: 8.13.1: unclear sentence - what is "more arrays" ? 1266, (clarification), text low Issue: 8.16 Operator overloading syntax - at most 2 arguments Comment: No error here; just a suggestion to make the grammar and terminology more precise. 1267, (enhancement), feature, low Issue: ifx-elsex enhancement, assign x to outputs if condition is x Comment: The requested feature can be expressed in other forms in the language so I think we can wait with this 1268, major, normal Issue: search order for data object and scope names is unclear and inaccurate Comment: This issue interacts with other name resolution issues that have been raised on the reflector. Any comprehensive name resolution proposal should deal with the issues here as well. 1271, (clarification), trivial, immediate Issue: A.6.2: delay_or_event_control should be optional in blocking_assignment Comment: The suggested grammar change is not strictly necessary (and in fact would create reduce/reduce conflicts if directly implemented) but does avoid an easy to make error in reading the grammar. I think that we should have an email vote on it and if anyone opposes the change, just close the issue as "won't fix" 1272, trivial, immediate Issue: Syntax 10-3: &&& should be all red Commnet: This is a duplicate of 929. 1272 should be closed and 929 should be an email vote. 1280, major, high Issue: Wrong replication example at end of 3.8 Comment: Due to the syntax change, inconsistent examples lead to quite a bit of confusion. I think that Greg's suggested expansion is correct. 1291, feature, immediate Issue: range and signedness are parallel attributes of every packed dimension Comment: Brad has suggested that we close this as "won't fix". I agree. 1292, minor, normal Issue: clarify compiler directive placement (non-)restrictions Comment: most of the clarification is likely "minor" but there are interactions with `protect that might argue for bumping this to major. I left it as minor but it wouldn't take much for me to agree that this is major. Gord. -- -------------------------------------------------------------------- Gordon Vreugdenhil 503-685-0808 Model Technology (Mentor Graphics) gordonv@model.comReceived on Thu Apr 20 10:32:20 2006
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