RE: [sv-bc] parameterized structures

I would like to see structures evolve into static synthesizable classes
(i.e. have methods and have inheritance, but it's a question of
priorities. The time spent is not just the person writing the proposal,
but the whole committee's time in reviewing it and the editor's time
putting it in the LRM, etc.

Sure it's a lot more fun adding enhancements, but we should be
discussing Gord's name resolution issues and what to do with %m, etc. to
make progress in having a solid LRM.

Dave
 

> -----Original Message-----
> From: owner-sv-bc@server.eda-stds.org [mailto:owner-sv-bc@server.eda-
> stds.org] On Behalf Of Bresticker, Shalom
> Sent: Thursday, June 15, 2006 7:26 AM
> To: Vreugdenhil, Gordon; Feldman, Yulik
> Cc: sv-bc@server.verilog.org
> Subject: RE: [sv-bc] parameterized structures
> 
> If someone wants to invest his time in writing a proposal for a useful
> enhancement, I don't think we should reject it.
> 
> > I don't think we should be in the space of making this
> > kind of extension right now since there are too many
> > other things to be looking at, but I don't think this
> > would be a stretch at all.
> 
> Shalom