1119: You're right about the missing 'end'. I fixed it and uploaded a corrected version. Regarding incompatibility with existing implementations: a. The proposal treats expansion of macro calls and substitution for formal argument identifiers the same way, i.e., neither is done within a string. Do the existing implementations you refer to distinguish between them? b. If such expansion and substitution are performed within strings, then what is the need for `"? c. Since other existing implementations behave as described in the proposal, there will be an incompatibility with some existing implementations in any case and implementations are incompatible with each other. I think the LRM should not leave this ambiguous and needs to choose one of the behaviors. 1209: I fixed the problems and uploaded a new version. I changed 'parameter aggregate' to 'aggregate parameter' in order to be consistent with the usage in the rest of the LRM. Shalom > SVDB 1119 ___Yes __X_No > http://www.verilog.org/svdb/bug_view_page.php?bug_id=00001119 > > Reasons -- missing 'end' in example, and incompatible with existing > implementations. > > SVDB 1209 ___Yes _X__No > http://www.verilog.org/svdb/bug_view_page.php?bug_id=00001209 > > Reasons -- missing bolding on keywords, 'struct' instead of > 'structure', and wondering why it says both 'aggregate parameter' and > 'parameter aggregate'.Received on Thu Sep 28 03:38:26 2006
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