RE: [sv-bc] logic A[ 2'b11<<1 ]

I agree with Steve's argument. As the writer of that (now flawed)
statement, it was never the intent to modify the precision or the
expression. This should be spelled out explicitly in the LRM whether we
decide to modify the equation or not.

	Arturo

-----Original Message-----
From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On Behalf Of
Steven Sharp
Sent: Tuesday, October 03, 2006 11:56 AM
To: sv-bc@eda.org; Brad.Pierce@synopsys.COM
Subject: RE: [sv-bc] logic A[ 2'b11<<1 ]

And after considering further...

Where the text says [0:size-1], what does 'size' represent?  I think
it represents the *number* that was computed from the expression, not
the expression itself.  

If it represented the expression itself being substituted into the
larger expression, as Brad suggests, then things get really strange.
Note that there are no parentheses around size in the larger expression.
That allows a substituted expression to re-associate.  So if
"logic A[ 2'b11<<1 ]" just substitutes "2'b11<<1" for size in "size-1",
you get

  logic A[ 0 : 2'b11<<1-1 ]
  
which is equivalent to

  logic A[ 0 : 2'b11<<(1-1) ]

because '-' has higher precedence than '<<'.  So this isn't a 32-bit
expression after all, because the '-1' is in the shift count!  Anyway,
the result of this is

  logic A[ 0 : 2'b11<<0 ]
  
or

  logic A[ 0 : 2'd3 ]
  
Obviously this is not the intended behavior.  The 'size' that is being
substituted is not the expression, but the value of the expression.
The value of the expression is 2'b10.

Steven Sharp
sharp@cadence.com