RE: [sv-bc] Are modport port directions enforced?

From: Mark Hartoog <Mark.Hartoog_at_.....>
Date: Mon Feb 26 2007 - 13:16:31 PST
If it is a variable, as in your example, it should be an error. If it is
a net, then you might argue it should be allowed.


________________________________

	From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On Behalf
Of Francoise Martinolle
	Sent: Monday, February 26, 2007 1:08 PM
	To: sv-bc@eda-stds.org
	Subject: [sv-bc] Are modport port directions enforced?
	
	
	I have a question regarding the modport port directions.
	If I declare a modport port in an interface with direction
input, should it be an error
	if the module which uses this modport tries to assign to the
modport port of direction input?
	 
	I cannot find anything in the LRM which talks about modport port
direction enforcements.
	
	interface data_if ();
	 
	logic [31:0] d;
	 
	modport in  (input d);
	
	modport out (output d);
	 
	endinterface: data_if
	 
	module duv (data_if.in i, data_if.out o);
	 
	assign i.d = o.d;     ====> is this allowed?
	 
	endmodule: duv
	 
	endinterface: data_if

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Received on Mon Feb 26 13:16:51 2007

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