[sv-bc] Are modport port directions enforced?

I have a question regarding the modport port directions.
If I declare a modport port in an interface with direction input, should
it be an error
if the module which uses this modport tries to assign to the modport
port of direction input?
 
I cannot find anything in the LRM which talks about modport port
direction enforcements.
interface data_if ();
 
logic [31:0] d;
 
modport in  (input d);

modport out (output d);
 
endinterface: data_if
 
module duv (data_if.in i, data_if.out o);
 
assign i.d = o.d;     ====> is this allowed?
 
endmodule: duv
 
endinterface: data_if

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