RE: [sv-bc] Agenda: Monday April 30 SV-BC CC

I think 

SB1-6-1
SB1-6-3
SB1-7-1 

could also be discussed. 
SB1-7-1 in particular, should not be controversial. 
The no vote was due to a misunderstanding.

For SB1-6-1, the specific proposal is to change:

"6.1 Value set

SystemVerilog makes a distinction between an object and its data type. A
data type is a set of values and a set of operations that can be
performed on those values. Data types can be used to declare data
objects or to define user-defined data types that are constructed from
other data types. A data object is a named entity that has a data value
associated with it, such as a parameter, a variable, or a net.

6.1.1 Logic values"

TO

"6.1 Data types and data objects

SystemVerilog makes a distinction between an object and its data type. A
data type is a set of values and a set of operations that can be
performed on those values. Data types can be used to declare data
objects or to define user-defined data types that are constructed from
other data types. A data object is a named entity that has a data value
associated with it, such as a parameter, a variable, or a net.

6.2 Value set
6.2.1 Logic values"

I also added proposals to Manti 1004, 1400, and 1606.

Shalom

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