[sv-bc] Query related to Cross Coverage

From: Sandeep Dasgupta <sandeep_at_.....>
Date: Wed Jul 11 2007 - 03:57:42 PDT
Hi,

I have the following query  related to the cross_item construct,

Consider the test case,

module top;

 bit [3:0] a, b, c;
 reg clk;
 wire w;

 covergroup cov2 @(posedge clk);
  BC: coverpoint b+c;
  aXb : cross  BC,   w ;       <--  Usage of a wire net as cross_item.
 endgroup
endmodule

Now as per IEEE Std 1800-2005, section 18.5,
cross_item ::= cover_point_identifier
                      | variable_identifier
variable_identifier :: identifier

Now i think the usage of w (a wire net) as the cross_item (in the above 
mentioned testcase ) is illegal,
as w does not seem to  be a variable identifier.But most of the 
simulators let the testcase pass.
So please suggest what would be the ideal behaviour.


Thanks and Regards,
Sandeep Dasgupta.






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