RE: [sv-ec] RE: [sv-bc] Hierarchical reference in clocking signal

Jonathan,

I'm sorry if I mislead you. As we discussed in the past, we agreed to
remove the dotted expression forms from the clock-var declarations - we
all agree on that.

I was noting that not all dotted expressions represent hierarchical
expressions.

	Arturo

-----Original Message-----
From: Jonathan Bromley [mailto:jonathan.bromley@doulos.com] 
Sent: Wednesday, July 11, 2007 11:28 AM
To: Arturo Salz; Surya Pratik Saha; sv-bc@eda-stds.org;
sv-ec@eda-stds.org
Subject: RE: [sv-ec] RE: [sv-bc] Hierarchical reference in clocking
signal

Arturo,

> In that particular example, the clock-variables are not hierarchical
> expressions. The "a" in question represents an interface modport, and
> allows users to access the members of the interface or modport without
> the need for creating hierarchical expressions to each 
> interface member.
>
> Not all dotted expressions are hierarchical references.

That's a very interesting interpretation; I *think* that I rather
fundamentally disagree, but let's put that to one side for now.

If you're right, then the BNF is broken because the syntax for
a clockvar in the BNF has only one choice: "signal_identifier".
This in turn has only one choice, "identifier", which doesn't 
admit the form "modport_ID.signal_ID".  So whichever way
you look at Surya's problem, an LRM fix is required.

The latest versions of three major simulators all choke 
on exactly this syntax, precisely as Surya said.  
Wouldn't it be easier and safer simply to outlaw it?  
The "hierarchical_expression" form of clockvar is an easy 
workaround, and it's clear that there are no backward-
compatibility issues at this time.  Nothing to lose.

It's easy to relax a syntax restriction in a later version
of the language; it's much harder to fix loosely-defined
syntax retrospectively, when there's been enough time for
all the back-compatibility traps to be well and truly baited.
-- 
Jonathan Bromley, Consultant

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