[sv-bc] Interface item reference

Hi,
Consider the following e.g.:

      1 interface intf;
      2     int a;
      3 endinterface
      4
      5 module top;
      6     initial
      7         intf.a = 1;
      8 endmodule

Is the hierarchical reference illegal? LRM does not clearly mention that 
hierarchical reference of interface item can only be possible by 
instantiation. Though most of the standard simulators fail the case.

-- 
Regards
Surya





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