> > For example, we don't expect > > modules to act the same way as subprograms when their formals > > and actuals have differing vector widths. > We don't? Surely, for inouts at least, the widths of module port and connection must match; but for subprograms there's simple copy-in, copy-out with extension and truncation as required. And every tool I use chokes or warns on any width mismatch across a module port, but (as I know to my cost) correctly and happily tolerates the mismatch across a subprogram argument. -- Jonathan -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Tue Jul 17 05:03:12 2007
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