With (muted) apologies for following-up my own post... > Recent discussion of the semantics of a modport element with > output direction has converged on the idea that modport output > to a variable in the interface represents a continuous > assignment to the variable from something in the connected > module. I'm fairly sure that most tools currently get > this wrong Of three major simulators: - One doesn't error on multiple explicit continuous assigns to a variable - not even when both assigns are in the same scope as the variable itself - so it's no big surprise that it also doesn't error on multiple writes to a variable in an interface via "output" modports. - Two correctly report multiple explicit continuous assigns to a variable, but do NOT report any error on multiple writes to an interface variable via "output" modports. So there is *absolutely no* de-facto support for the consensus opinion I mentioned in the earlier post, but there is strong de-facto support for the "output === ref" position that I mistakenly took earlier in the discussion. Do I simply submit bug reports to three vendors, or do we need some LRM clarification? -- Jonathan Bromley, Consultant DOULOS - Developing Design Know-how VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services Doulos Ltd. Church Hatch, 22 Market Place, Ringwood, Hampshire, BH24 1AW, UK Tel: +44 (0)1425 471223 Email: jonathan.bromley@doulos.com Fax: +44 (0)1425 471573 Web: http://www.doulos.com The contents of this message may contain personal views which are not the views of Doulos Ltd., unless specifically stated. -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Wed Jul 18 18:01:28 2007
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