RE: [sv-bc] Unconnected ports using .name implicit ports (SVDB 1660??)

After 1660, the text for .name now says,

"A .port_identifier port connection is semantically equivalent to the
named port connection .port_identifier(port_identifier) with the
following exceptions:

- The port connection shall not create an implicit net declaration.
- The declarations on each side of the port connection shall have
equivalent data types.
- An implicit .port_identifier port connection between nets of two
dissimilar net types shall generate an error when it is a warning in an
explicit named port connection as required by 22.3.3.7.

It shall be an error if the name port_identifier has not been declared
(explicitly or implicitly) or imported from a package (by explicit or
wildcard import) prior to the .port_identifier implicit port
connection."


I would not object to adding an additional sentence in .* to explicitly
emphasize that unconnected ports have to be explicitly listed, but I
don't think the above text leaves any holes or ambiguities.

Shalom
 

> -----Original Message-----
> From: owner-sv-bc@server.eda.org 
> [mailto:owner-sv-bc@server.eda.org] On Behalf Of Clifford E. Cummings
> Sent: Monday, October 15, 2007 4:39 PM
> To: sv-bc@server.eda.org
> Subject: [sv-bc] Unconnected ports using .name implicit ports 
> (SVDB 1660??)
> 
> Hi, All -
> 
> Shalom pointed out SVDB 1660. I'm not sure if it is clear 
> that unconnected ports must be explicitly listed as empty ports (i.e. 
> ...  .port1(), ... when instantiating a module with an 
> unconnected port. What do SV-BC members think?
> 
> Regards - Cliff
> 
> At 07:30 AM 10/15/2007, Bresticker, Shalom wrote:
> >Cliff,
> >
> > > Clarify the .name implicit ports require unconnected ports to be 
> > > listed in the instantiation.
> >
> >Was this resolved by Mantis 1660?
> >
> >Regards,
> >Shalom
> 
> ----------------------------------------------------
> Cliff Cummings - Sunburst Design, Inc.
> 14314 SW Allen Blvd., PMB 501, Beaverton, OR 97005
> Phone: 503-641-8446 / FAX: 503-641-8486
> cliffc@sunburst-design.com / www.sunburst-design.com Expert 
> Verilog, SystemVerilog, Synthesis and Verification Training
> 
> 
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