[sv-bc] Mantis 1828

Another complication on this is a case like the following:

always @(posedge clk or posedge rst)
	if (rst)
		q[2:0] <= 0;
	else begin
		q[2] <= in2;
		q[0} <= in0;
	end

This is the form of a flip-flop, but q[1] only gets a reset value. This
can occur, for example, where one defines an entire 32-bit register, but
some of the bits are reserved for future use only.		 

In this case, some synthesis tools will synthesize those bits as
latches, not as flip-flops. Some lint tools, following the synthesis
tools, will relate to those bits as latches also.

So should always_ff flag an error in such a case? I doubt it.

Shalom

> Yes on 1828 with the friendly amendment that we change 
> "should" to "shall".  "Should" is still a recommendation, 
> albeit stronger that "can".  "shall" requires implementations 
> to issue these warnings.  My only hesitation would be the 
> forced requirement on _all_ implementations.  I am not sure 
> that simulation tools care about this as much as synthesis 
> implementations so I'll let the software folks make that 
> judgment call. IMHO, I would personally like even simulation 
> tools to make this check if they are not already doing so and 
> issue the warning.
---------------------------------------------------------------------
Intel Israel (74) Limited

This e-mail and any attachments may contain confidential material for
the sole use of the intended recipient(s). Any review or distribution
by others is strictly prohibited. If you are not the intended
recipient, please contact the sender and delete all copies.


-- 
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.