Re: [sv-bc] realtime is by default signed or unsigned.

Hi Steven,

Consider the following example.

module tmp();
logic signed [63:0] var1 [1:0];
realtime var2[1:0];

initial
var2 = var1;

endmodule

For above testcase some simulator is showing error as "Array elements 
must both be signed or both be unsigned" while
some is passing.

So I was in confusion that whether is should be treated as signed or 
unsigned.

Thanks
Dhiraj

Steven Sharp wrote:

>>From: Dhiraj Kumar Prasad <dhiraj@cal.interrasystems.com>
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>>I have a query related to realtime. realtime by default is signed or 
>>unsigned ??.
>>    
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>realtime is equivalent to real, which is a floating point number.  It
>is inherently signed and there is no unsigned version of it.
>
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>>Different simulator is treating it in different way.
>>    
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>What behavior are you seeing that you interpret as unsigned?
>
>Steven Sharp
>sharp@cadence.com
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>  
>




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