[sv-bc] 22.2.2.2 port types

Hi,

22.2.2.2 (ANSI style ports) says,

"The self-determined type of the port expression becomes the type for
the port. The port expression shall not be considered an assignment-like
context. The port expression must resolve to a legal expression for type
of module port (see 22.3.3). The port expression is optional because
ports can be defined that do not connect to anything internal to the
port."

I don't understand this paragraph, especially the first and third
sentences. Can someone explain it to me?

Thanks,
Shalom

Shalom Bresticker
Intel Jerusalem LAD DA
+972 2 589-6582
+972 54 721-1033

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