[sv-bc] 22.6: missing commas in code

From: Bresticker, Shalom <shalom.bresticker_at_.....>
Date: Fri Feb 20 2009 - 01:26:16 PST
In 22.6, in Example 3, there are two two-line $display statements with two string literals without commas being them. This error was introduced as a result of the correction implemented in 1364 BTF 309 way back when.

I'm embarrassed that we did not notice this.

This was found in the Verilog-AMS committee.

Shalom Bresticker
Intel Jerusalem LAD DA
+972 2 589-6582
+972 54 721-1033


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Received on Fri Feb 20 01:27:35 2009

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