Cliff's votes. Proposed friendly amendments for 2667 and 2677. All others, Cliff votes yes (see attached PDF for colors and strike-outs. SVDB 2664 - Yes http://www.eda.org/svdb/view.php?id=2664 SVDB 2666 - Yes http://www.eda.org/svdb/view.php?id=2666 SVDB 2667 - No Proposed friendly amendment shown (I could vote yes on the original proposal, but I think the last sentence is a bit confusing and would prefer the proposed wording). http://www.eda.org/svdb/view.php?id=2667 WAS: Similarly, since T2 requires an instantiation override, the evaluation of p2 shall only occur with the type defined by the parameter override. PROPOSED: Similarly, since T2 requires an instantiation override, the evaluation of p2 shall be illegal unless a parameter override with an integral type occurs. SVDB 2668 - Yes http://www.eda.org/svdb/view.php?id=2668 SVDB 2677 - No Proposed friendly amendment http://www.eda.org/svdb/view.php?id=2677 When I first read the proposed wording, it looked like the forward typedef could be in an earlier scope or in a later scope ("scope either before or after the final type definition"). Add "same" and a comma after "scope" and the ambiguity goes away. WAS: ... It shall be legal to have a forward type declaration in the scope either before or after the final type definition. PROPSED: ... It shall be legal to have a forward type declaration in the same scope, either before or after the final type definition. If I understand the proposal correctly, it just says you can have as many forward typedefs in a scope and put them anywhere, although the practice seems faulty and confusing to me. It only allows for one final type definition, which is then applied to all forward typedefs, wherever they might be placed within the same scope. Is this correct? SVDB 2690 - Yes http://www.eda.org/svdb/view.php?id=2690 Proposal: Resolved by 1492 ---------------------------------------------------- Cliff Cummings - Sunburst Design, Inc. 14314 SW Allen Blvd., PMB 501, Beaverton, OR 97005 Phone: 503-641-8446 / FAX: 503-641-8486 cliffc@sunburst-design.com / www.sunburst-design.com Expert Verilog, SystemVerilog, Synthesis and Verification Training -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.
This archive was generated by hypermail 2.1.8 : Sun Jun 07 2009 - 11:18:51 PDT