RE: [sv-bc] Query related with explicit name port declaration.

This at least gives the impression that the direction is declared for P1
and P2, not for r. This in fact would not allow mixed directions within
a single port, as in the non-ANSI example, but it does allow half of r
to be declared as output and half to be declared as input, which is not
possible with the non-ANSI port style.

[DR] This bizarre case is of no great loss.


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