RE: [sv-bc] Query related with explicit name port declaration.

From: Bresticker, Shalom <shalom.bresticker_at_.....>
Date: Mon Nov 16 2009 - 04:25:01 PST
Maybe, but those are the examples chosen to be shown in the LRM.
And you know Murphy's Law: If it's legal, someone will find a use for it.

Shalom

________________________________
From: Rich, Dave [mailto:Dave_Rich@mentor.com]
Sent: Sunday, November 15, 2009 5:34 PM
To: Bresticker, Shalom; Greg Jaxon
Cc: Dhiraj Kumar Prasad; sv-bc@server.eda.org
Subject: RE: [sv-bc] Query related with explicit name port declaration.


This at least gives the impression that the direction is declared for P1 and P2, not for r. This in fact would not allow mixed directions within a single port, as in the non-ANSI example, but it does allow half of r to be declared as output and half to be declared as input, which is not possible with the non-ANSI port style.

[DR] This bizarre case is of no great loss.
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Received on Mon Nov 16 04:27:13 2009

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