Subject: Face to Face Meeting On November 12 at Mentor Graphics -- San Jos e
From: Vassilios.Gerousis@Infineon.Com
Date: Thu Nov 01 2001 - 07:32:33 PST
Hello Everyone,
As we discussed before, our next face to face meeting is planned for
November 12. Here is some information:
1- Meeting Place: Mentor Graphics in San Jose -- Thanks Dennis our host.
2- Time to start : 9:00 am.
3- Agenda: My hope is to have good technical review and also to meet with assertion committee.
a- Review Actions from all previous calls.
b- Review of proposal or descriptions from members (e.g. interfaces, more examples, etc., ...).
c- Review of the second version of the LRM (STU will send it few days earlier).
-- Address hot issues (editor's note).
-- Issues likes $root.
-- let me know.
d- Process , definition, and deprecating list (Stu and Cliff).
e- Review of the assertion activities:
a- Plans for assertions in Verilog-ACE release.
b- Some requirements from assertions needed for ACE.
c- OVL plans
f- Press release review for both Verilog-ACE and assertion.
d- Planning for our next milestone (HDLCON) -- Public release of DRAFT 1 of
Verilog-ACE, OVL and assertions constructs.
4- Closing and action items.
Please let me know what else you would like to see.
PS. I know that assertion committee is planning to have a meeting on the 14th. Please continue to have this. I need to ensure that we collectively close on open items. So I hope that many of the assertion members will attend.
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Dr. Vassilios Gerousis Infineon Technologies
DAT CAD, MchB
Telephone: +49-89-234-21342 BalanSt. 73
Fax: +49-89-234-23650 D-81541 Munich
email: Vassilios.Gerousis@infineon.com Germany
Site Map: http://www.stadtplandienst.de/query;ORT=m;PLZ=81541;STR=Balanstr%2E;HNR=73
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