Subject: Verilog++ 11th Committee Meeting Minutes
From: Dave Kelf (davek@co-design.com)
Date: Mon Nov 05 2001 - 12:06:03 PST
Verilog++ 11th Committee Meeting
November 5th, 2001
DaveK, Stu leading. DaveK taking minutes
Attendees
(-aaaaaaaaaa) Vassilios Gerousis
(aaarar-aaaa) Dave Kelf *
(--aaa--aaaa) John Sanguinetti
(----ra-aaa-) John Emmitt
(aa--a-aa---) Dennis Brophy *
(aaaaaaaaaaa) Stu Sutherland *
(------aaaaa) David Knapp
(aaraaar-aaa) Tom Fitzpatrick *
(aa-aaaaaaa-) Phil Moorby *
(aa-aaaaaaaa) Anders Nordstrom *
(a--a-aaaaaa) Cliff Cummings *
(raaa-aaaaaa) Simon Davidmann (rep: Peter Flake)
(-----aaaa--) Harry Foster
(aaaaa-a-aaa) Stefen Boyd *
(aaaaaaaaaaa) David Smith *
(a--a-a--aa-) Mike McNamara *
(aaaa) Kevin Cameron *
(aa-a) Andy Tsay *
Agenda
Complete review of draft 1
Discuss Interface documentation
Discuss deprecation plan
Starting review from section 9.2
Anders: Can regular always or always @* be used in P37 2nd paragraph -
comment required
DavidS: State machine example status in 9.2.
Action Peter: Other examples have been provided in an email of Oct 8th.
Timing example and possibly example with async reset still required.
Stu: End section 9.3 note for Co-Design to provide mechanism for user to
specify state encoding method. This discussion needs to be shelved until
after the review as what is required is a method to specify encoding
methods, and that will take some effort.
Action Stu: Update note that this needs more work post review.
Stu: Section 9.4 Co-Design to provide fork join example. Example provided
in Peter's Oct 8th email. Also can we have randomized initialization of the
state variable. Peter thought that the best way to do this was to use an
initial block.
Stu : Diagrams need to be redrawn in Framemaker. Hierarchical FSM example
in Oct 8th email.
Anders: P43, Section 10. Are four lines after word "discussion" struck out,
relevant to processes. Needs statement to clarify.
Action Peter: Write statement on this.
Anders: P44, Section 10.3. Always_comb block. Should state that it is
illegal to read a variable before written? Andy: Need to say every variable
must be written before read. Strengthen statement. Stu will send wording
change to Cliff for quick review.
Cliff: Section 10.4. Wording should be improved. Impose restriction that
only one event control can be used in the always block.
Action Peter: Add wording and send to Stu.
Anders: Process Control - how to kill processes, etc. Useful for debug,
etc. Should be either put in, or processes in general should be taken out.
Peter - reason for inclusion is for things like pipeline modeling. Note
required to review with Get2Chip guys. Example has been provided on
pipeline model.
Anders: Section 11.3. Implies regular Verilog function is not legal.
Sentence should be changed to reflect that it is legal.
Stu: In general tasks and functions should be edited to reflect just new
items.
Action: Stu to reword this.
Stu: void function example required - Peter has already provided one.
Mention void function equivalent to task but has regular function timing
restrictions.
Stu: Section 12. No need for 2nd to 4th paragraphs.
Action: Stu to remove.
Stefen: Problem with $root. Could lead to difficulties with things like
global tasks, etc. Peter - useful for global constants, etc. Needs to be
looked at later.
Action Stu: to note in the draft that this needs more discussion later.
Anders: P51, section 12.4. testbench at the end - what is this really showing?
Action Stu: Remove testbench part of example.
Kevin: Has anyone thought about extern modules. Need proposal - could use
AMS proposal - for later discussion.
Cliff: Clarification required on timescales - are we getting away from
order dependency. Description needs to made a bit clearer as it is quite
complicated.
Action Stu: Will write defn in psuedo code form.
Stu: Section 12.7. Editors note already addressed.
Cliff: Is this the location for discussing modules with ".*" that is to
instantiate modules inheriting port lists from previous module.
Action Cliff: Write proposal to implement this - to be discussed later.
Stu: Explanation of the ability to place a range on a port.
Action Peter: Provide one sentence and example showing this.
DaveK: Editors note satisfied in PeterF's Oct8th email. Change wire to net.
Cliff: Section 14 Defparam stilll there
Action Cliff: Will write defparam deprecation proposal
Glossary Update
Peter needs list of words required
Action Stu: to generate list during editing.
BNF
Stu will update as it stablizes
Draft 2 To be issued on Friday, for review at face to face meeting on Monday
Interface Chapter
Peter and Tom have re-written it. It now includes better examples and more
description of their syntax. However, it still does not contain the
application note style information that is required. We agreed that the
chapter as is should be reviewed next week at the face to face meeting for
inclusion in the first draft, and Co-Design/Accellera folks should figure
out how we can get the application info into the doc, offline.
Next meeting is the face to face as detailed by Vassilios in a previous
email, on November 12th at 9:00am at Mentor Graphics, CA. Some people will
have to phone in for this so its quite important that we have a reasonably
timed agenda.
Action Vassilios to provide agenda before the meeting.
Thanks for all of your help in this marathon meeting.
______________________________
Dave Kelf
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