Subject: Re: datapath enhancements to verilog
From: Paul Graham (pgraham@cadence.com)
Date: Tue Dec 11 2001 - 12:15:22 PST
Vassilios,
I'd like to know how to join the Accellera committee which deals with
verilog language extensions. I assume this would be the Verilog++
committee.
My background is in parsers and rtl synthesis. I'd like to see where
Verilog is heading, and to contribute our Verilog-DP specification.
Paul
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