Re: HDL+ Meeting -- March 14 meeting at Mentor Graphics


Subject: Re: HDL+ Meeting -- March 14 meeting at Mentor Graphics
From: Stuart Sutherland (stuart@sutherland-hdl.com)
Date: Mon Mar 04 2002 - 08:25:29 PST


Vassilios,

I did respond to your request about my SNUG schedule. I am attending SNUG,
and while my paper presentation is not on the 14th, I do not want to miss
the entire day of the 14th. Is there any way you can condense the agenda
to fit from 8 am to 12:30 PM on 14th?

Stu

At 03:23 AM 3/2/2002, Vassilios.Gerousis@Infineon.Com wrote:
>Hello Everyone,
> Mentor is hosting our meeting on January 14. I have tried to get
> inputs from people
>who are attending to SNUG. But I have not received anything. Here is the
>details for the meeting:
>
>Mentor Graphics Office in San Jose, Near HDLCON.
> B1-106 conference room reserved. It has a conference phone in it. If you
> want to use my dial-in number, it is: 888-742-8686 (Int'l:
> +1-303-928-2600). The ID is 8009932.
>Lunch will be provided. If there are dietary considerations, please let me
>know. (A breakfast snack and afternoon snack with be offered as well.)
>
>Agenda:
>
>1- 9 am to 2:00 pm Verilog ++ Sessions.:
> a- Draft 4 will be reviewed.
> b- Issues list and status will be reviewed.
> c- Assertion donation will be discussed: Presentation by Co-design.
> d- Action Items and milestones updates.
>
>2- 2:00 PM to 4:00 PM HDL+ session (Verilog++ and Assertion).
> a- Re-examine Goals, Status and Usage Model (I encourage Real
> Intent, Verplex, 0-In, Co-Design and few other vendors plus users to attend).
> b- Synchronization of Deliverables for May delivery to the
> Accellera Board to meet DAC release date.
> c- Examining multiple activities of HDL+ and how to best address
> each areas. (Is it time to
> form a VHDL assertion committee?).
> d- Action Items and Milestones updates.
>
>I will send a password protected assertion donation from Co-Design.
>
>Best regards
>
>Vassilios
>
>------------------------------------------------------------------------------------------------------------------------------
>Dr. Vassilios Gerousis Infineon Technologies
> DAT CAD, MchB
>Telephone: +49-89-234-21342 BalanSt. 73
>Fax: +49-89-234-23650 D-81541 Munich
>email: Vassilios.Gerousis@infineon.com Germany
>Site Map:
>http://www.stadtplandienst.de/query;ORT=m;PLZ=81541;STR=Balanstr%2E;HNR=73
>----------------------------------------------------------------------------------------------------------------------------------

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Stuart Sutherland Sutherland HDL Inc.
stuart@sutherland-hdl.com 22805 SW 92nd Place
phone: 503-692-0898 Tualatin, OR 97062
www.sutherland-hdl.com
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