Subject: Re: Begin-End / { } / < > ?
From: Adam Krolnik (krolnik@lsil.com)
Date: Tue Mar 05 2002 - 08:36:09 PST
Good morning Cliff;
You wrote:
"We have all complained for years that Verilog requires
begin-end while the C-Language uses { }."
I know that you are only lamenting that you have to type 'begin' instead
of '{' and are really not interested in making verilog into the C
language.
If this was the goal, the C <-> RTL tools would be places to start. But
I know that this is not what want to do.
Adam Krolnik
Verification Mgr.
LSI Logic Corp.
Plano TX. 75074
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