Subject: Updated Minutes for March 14th Meeting
From: Dave Kelf (davek@co-design.com)
Date: Mon Mar 18 2002 - 11:10:32 PST
Hi All,
I am resending the minutes for last weeks meeting. These have been updated
with the results of the end of the meeting provided by Vassilios, that I
was not able to document previously, as well as an updated attendee list.
Regards
Dave
SystemVerilog 18th Committee Meeting Minutes
March 14th, 2002
Face to face meeting
Hosted by Mentor Graphics
Attendance
(aaaaaaaa-aaaaaaaaaa) Vassilios Gerousis *
(aaaraaa-aaarar-aaaa) Dave Kelf *
(---------aaa--aaaa=) John Sanguinetti
(aaaaaaaaaa--a-aa---) Dennis Brophy *
(a--aaaaaaaaaaaaaaaa) Stu Sutherland *
(----a--------aaaaa=) David Knapp
(aaa--aaaaaraaar-aaa) Tom Fitzpatrick *
(---a-arraa-aaaaaaa=) Phil Moorby
(--aaa-aaaa-aaaaaaaa) Anders Nordstrom
(--aaaaaa--a-aaaaaa=) Cliff Cummings
(aaaaaaaaraaa-aaaaaa) Simon Davidmann *
(aaaaaaaaaaaaaaa====) Peter Flake *
(aa--aaaa-aaaaa-aaaa) Stefen Boyd *
(--aaaaaaaaaaaaaaaaa) David Smith
(--aaa-aaa--a-a--aa=) Mike McNamara
(aaaaaaaaaaaa=======) Kevin Cameron *
(aaaaa-a-aa-a=======) Andy Tsay *
(aaaa-aa============) Alec Stanculescu *
(-----a=============) Adam Krolnik
(--aaa==============) Paul Graham
(----a==============) David Seifert
(a==================) Alex Zamfirescu
Also Present (Gentlemen - let me know if you are joining the committee)
Richard Jones
Wolfgang Ecker
Robert Floyd
Also Attending From the Assertions Committee
Harry Foster
David Lacey
Agenda:
A. Synchronization and Milestones
B. Draft 4 Review
Editor Comments
Review Comments
C. Issue List Tracking
D. Assertion Presentation by Co-Design
E. BNF Review
A. Synchronization / Milestones
June 1st target to release standard
Deadline that we are under SystemVerilog Draft to the Board May 1st
So 6 weeks to clean it up from this meeting date
Proposals not already documented will not be accepted from today
Timeline agreed:
Assertions Document Vote April 4th
April 8th to May 1st documentation completion effort
Target April 8th to complete final issues - no changes after this date
April 12th final draft ready
April 22nd final review complete
April 22nd committee balloting on document draft
May 1st Document goes to Accellera board
May 15th Presentation to board by VG
June 1st Standard release (assuming all is well)
Weekly meetings will be required from now until April 12th every Monday at
9:00am PST
Version Number currently set to 3.0. Committee agreed at this is the right
number to use to demonstrate continuity from earlier versions of Verilog
A next version of SystemVerilog - possibly 3.1, will be targeted for
roughly 6 months after release of first standard. New proposals may be put
forward for consideration for this draft
B. Document review
Editors notes still included
BNF section still has to be added - good work by Steve B to check it out
BNF needs careful and thorough review - Alec will be testing with his
checker as soon as possible
ACTION Items for next meeting (18 March) for all participants
Provide feedback on Draft4 document editor notes so that they can be dealt
with for the following meeting
Provide feedback on Draft4 BNF so that it can be dealt with for the
following meeting
C. Issues List
1. $root
Owner: Kevin
Kevin will take this issue over from Steve and provide proposal for the
next meeting on 18th March.
ACTION: Steve - maybe you could update Kevin on your thoughts quickly.
2. Basic FSM Syntax
Owner: Cliff
Cliff has raised objection to constructs and provided some examples.
Co-Design has to provide analysis. Co-Design will provide counter proposal
a few days earlier than 25th March and we will discuss it at 25th March
meeting.
ACTION: Co-Design Counter proposal
3. .*
Owner Cliff
Issue on agenda for meeting of 18th March. We need to vote to continue to
look at this problem at this time.
4. Interface Section
Owner: Co-Design (Tom)
Documentation has been provided which provides clarifications. Need to
remove reference included in document. Alex will look at this and provide
his opinion on March 18th. Based on this we will decide whether we can
remove this issue or if more short term work is needed.
ACTION: Alex to get back to us with comments.
5. BNF
Being worked as part of the manual. Steve B will update and work with Alec.
6. Inferred Declaration, Inheritance
This issue is closed for this release. Can be discussed for 3.1 Release
7. Hierarchical / multi-clock FSMs
Closed for this release. Can be discussed for 3.1
8. Deprecating Items
Closed for this release.
9. Adams Email Contents
Peter will send reply next day or so. There are items that should be
discussed at this will be done on meeting of 18th March
ACTION: Peter to provide reply
10. Packed / Unpacked Arrays
Owner Paul.
Need proposal by 18th March. If not received, then this needs to be closed
for this release.
ACTION: PAul to provide proposal if you still wish this to be considered
for this release.
11. Glossary
Owner: Stu
Will create list by March 25th. Peter will go through it and complete
definitions.
ACTION: Stu/Peter
12. Inout jumper port
Owner Stefen
Will create proposal for March 25th Meeting, for discussion and review at
that time.
Note: proposals closed for this release may be revisited for next release
in six months.
D. Tom / Peter provided assertion presentation and brief discussion
E. BNF Notes - Steve will include within BNF description.
Detailed Review of the BNF: Thank you Stefen for taking the time to get the
BNF up to date. Stefen raised several disconnects. As a results, there are
few action items for both Peter Flake and Stefen. Peter should have a short
list of modification as well as additions to the main document which will
be update with Stefen and Stu.
Next meeting
Monday 18th March 2002
Teleconference
405 244 5555 access code 3715
Co-Chair Note:
At this point in the process, we need to close issues and complete actions
promptly. Please fulfill any actions you have by the meeting time set -
thanks - Dave.
Thank you for your time today.
______________________________
Dave Kelf
VP Marketing
Co-Design Automation, Inc.
Tel: 1 877 6 CODESIGN ext 404
Mobile: 1 617 571 9883
Fax: 1 781 662 2281
Email: davek@co-design.com
Web: www.co-design.com
www.superlog.org
Latest News:
http://www.co-design.com/news/index.htm
"Faster, Smarter Verilog"
______________________________
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