SystemVerilog 20th Committee Meeting 3/25/02

Subject: SystemVerilog 20th Committee Meeting 3/25/02
From: Tom Fitzpatrick (fitz@co-design.com)
Date: Mon Mar 25 2002 - 11:10:20 PST

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SystemVerilog 20th Committee Meeting Minutes
March 25th, 2002
Teleconference

Attendance
(aaaaaaaaaa-aaaaaaaaaa) Vassilios Gerousis *
(-aaaaraaa-aaarar-aaaa) Dave Kelf *
(-----------aaa--aaaa=) John Sanguinetti
(aaaaaaaaaaaa--a-aa---) Dennis Brophy *
(aaa--aaaaaaaaaaaaaaaa) Stu Sutherland *
(------a--------aaaaa=) David Knapp
(aaaaa--aaaaaraaar-aaa) Tom Fitzpatrick *
(-----a-arraa-aaaaaaa=) Phil Moorby
(aa--aaa-aaaa-aaaaaaaa) Anders Nordstrom *
(a---aaaaaa--a-aaaaaa=) Cliff Cummings
(-aaaaaaaaaraaa-aaaaaa) Simon Davidmann *
(aaaaaaaaaaaaaaaaa====) Peter Flake *
(a-aa--aaaa-aaaaa-aaaa) Stefen Boyd
(----aaaaaaaaaaaaaaaaa) David Smith
(aa--aaa-aaa--a-a--aa=) Mike McNamara *
(aaaaaaaaaaaaaa=======) Kevin Cameron *
(-aaaaaa-a-aa-a=======) Andy Tsay *
(aaaaaa-aa============) Alec Stanculescu *
(aa-----a=============) Adam Krolnik *
(aa--aaa==============) Paul Graham *
(------a==============) David Seifert
(-aa==================) Alex Zamfirescu *

Discussion about the Vote:
Both .name and .* passed via email vote.
Cliff to distribute updated proposals to incorporate these features
throughout the text.
Some suggestions were made about restricting .* to either the beginning or
the end of the port list. Cliff to investigate alternatives.
Peter suggested that there is no definitive reason to limit it anywhere.

.*/.name are mutually exclusive per-instance, just as named vs. positional
connections are exclusive per-instance.

Stu's questions about actions from previous meeting re: editor's notes have
been addressed.
Draft 5 will be distributed after feedback from this meeting is
incorporated.

Re: Peter's email 3/19 "Actions from 19th committee meeting"
Editor's note in Draft4 section 12.10 has been resolved. Stu to update
draft5.

Discussion of Peter's response to Cliff's state machine proposal. Subject:
"RE: Cliff Cummings - FSM Proposals and models"
Cliff to analyzer whether he believes "transition enum" is required, or if
it's OK just to use enum, subject to namespace rules.
Cliff to try and recode his examples using these new proposals, by Friday
3/29.

Discussion of Adam's email 3/5/02 and Peter's reply on 3/18 or 3/11.
Section 7.9: Peter to provide additional examples to show how to avoid
warning messages.
Section 10.3: Adam to provide additional examples that show issues with
always_comb function sensitivity, and show how this functionality may be
modelled using some of the new constructs (.*, nested modules, etc).
Proposal will include editor's notes to delete/modify/add to the draft.
Peter to provide better justification argument about why this feature is
needed. Both Adam's and Peter's proposals to be distributed by 3/29.
Section 12.5: Stu to remove the paragraph beginning "A port may also have
its own name specified, and an expression of nets or variables." and the
accompanying example. Unconnected inputs shall follow the rules of the
1364-2001 spec.

Discussion on Paul Graham's email 3/18/02 "Comments on packed arrays".
This is an attempt to make Verilog arrays more like VHDL arrays.
1) Can unpacked arrays be used in port lists?
2) Should we restrict to a single packed array bound before the type?
3) What are the implications on typedefs?
4) Need to clarify the affect of this on structs/unions
Paul/Stu to submit concrete proposal by Friday 3/29.
Peter/Tom to submit a justification for packed multi-dimensional arrays.

Stefen proposal to remove named ports in ANSI module definition, since this
feature is not in 1364-2001
Cliff to see if he can come up with an example where it is useful to jumper
ports.

Stu to fix example on bottom of p. 43 to remove "string" datatype.

Next meeting 4/1. Same time, same dial-in number.

Thanks Everyone,
-t

Next message: Adam Krolnik: "Re: Unconnected inputs"
Previous message: Michael McNamara: "Unconnected inputs"
Reply: Adam Krolnik: "Section 10.3 always_comb and function sensitivity"
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