Re: FSM Section Vote?

Subject: Re: FSM Section Vote?
From: Anders Nordstrom (asic@sympatico.ca)
Date: Wed Apr 03 2002 - 18:56:04 PST

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>> AMENDED PROPOSAL: Remove the State Machine
>> Section (section 9 in draft 4)
>> from the SystemVerilog 3.0 LRM, and defer
>> transition statement and
>> operators for consideration in SystemVerilog 3.1.
>
>
I abstain from the vote on the amended proposal

Anders

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