Subject: RE: June 5th Meeting for HDL+ committee meeting -- PLEASE RSVP.
From: David Smith (david_smith@avanticorp.com)
Date: Wed May 22 2002 - 13:56:37 PDT
I plan to attend. I assume that this meeting is actually going to happen and not get rescheduled so will book my tickets tommorrow.
Regards
David
David W. Smith
System Architect
Avant! Corporation
9205 SW Gemini Drive
Beaverton, OR 97008
Voice: 503.520.2715
FAX: 503.643.3361
Email: david_smith@avanticorp.com
http://www.avanticorp.com
-----Original Message-----
From: Vassilios.Gerousis@Infineon.Com [mailto:Vassilios.Gerousis@Infineon.Com]
Sent: Tuesday, May 21, 2002 11:40 PM
To: vlog-pp@eda.org; assertion@eda.org
Subject: June 5th Meeting for HDL+ committee meeting -- PLEASE RSVP.
Importance: High
Dear members of Verilog++ and Assertions,
I need to get counts of people who will attend the meeting in person or by phone. We plan to organize the 3.1 of SystemVerilog release. It will be a full day from 9:00 until 4:00 PM. The main focus is to identify the focus of 3.1 release. He will have special presentations on new donations for the support of SystemVerilog 3.1.
I will send details in few days.
Best Regards
Vassilios
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