Subject: Changed the front pages of SystemVerilog 3.0 LRM
From: Vassilios.Gerousis@Infineon.Com
Date: Mon Jun 03 2002 - 12:45:53 PDT
Hie Verilog++ and assertions,
I am attaching the changed front pages (3). I need to get immediate feedback on the acknowledgement section. I have added people names who contributed to the SystemVerilog 3.0.
Please check the names for misspellings. If your name should be on this list, please let Stuart know by the end of day (5 PM).
We will publish a clean document as a standard, once the Board complete the vote today. Every member will receive a free copy for their participation. Additional copies, can be purchased from Accellera.
We will use a special version for committee use only to develop 3.1.
Best Regards
Vassilios
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Dr. Vassilios Gerousis Infineon Technologies
DAT CAD, MchB
Telephone: +49-89-234-21342 BalanSt. 73
Fax: +49-89-234-23650 D-81541 Munich
email: Vassilios.Gerousis@infineon.com Germany
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