Subject: Re: An Open Process
From: Simon Davidmann (simond@co-design.com)
Date: Thu Jun 20 2002 - 08:19:43 PDT
Vassilios - you are not following the rules here.
1) donations must be requested by committees
2) committees must meet and discuss things and vote in subsequent meetings
3) forming of committees can only be approved by the board
In the Board meeting last week - which you attended - it was agreed by the
Board that you would await the outcome of the investigation into voting,
processes, committees before moving forward.
As none of the above have been followed what you are doing now has no
sanction from the Accellera Board of Directors, is in clear violation of
its rules, and so please refrain.
It seems we will have to elevate these issues to the next Accellera Board
meeting.
I believe that SystemVerilog is a fundamental core to the work of
Accellera, its many committees, its public perception, and its direction
and the creation of committees etc needs to be discussed at the Board level
with the Board - as per the rules - and so yes please invite the Board to
your TCC meetings.
Also - as
Simon
At 07:41 AM 6/20/2002, Vassilios.Gerousis@Infineon.Com wrote:
>Hello Everyone,
> I am sending alot of my times trying to get SystemVerilog 3.1 up
>and running. I have sent you slides that outline what I propose to happen.
>My chairs and I need should be given few days and we will start the
>activities.
>So please have patience.
>
>1- We will agree on a plan for action with my chairs.
>2- Each committee will start meeting and planning.
>3- Assigned donations is being prepared in PDF in small sizes so that
>we can send each one to the appropriate committee.
> a- Synopsys was asked to provide smaller chapters to be sent to
> designated
> committee. By Friday, I will send an electronic version.
> b- New additional donations must be discussed with me ASAP.
>4- We will resolve the issues as we go on. But please help me instead of
>putting blocks
>in front me. Give an opportunity, and if I am not fair, then scream at me.
>5- My chairs have the additional responsibility to outline how we will
>synchronize SystemVerilog Assertions with Sugar. Harry Foster and Erich
>Marschner will help
>in this matter.
>
> So I ask, pretty please to give me a chance to get this rolling
> ASAP and getting
>most issues resolved instead of increasing it.
>
>Best Regards
>
>Vassilios
>------------------------------------------------------------------------------------------------------------------------------
>Dr. Vassilios Gerousis Infineon Technologies
> DAT CAD, MchB
>Telephone: +49-89-234-21342 BalanSt. 73
>Fax: +49-89-234-23650 D-81541 Munich
>email: Vassilios.Gerousis@infineon.com Germany
>Site Map:
>http://www.stadtplandienst.de/query;ORT=m;PLZ=81541;STR=Balanstr%2E;HNR=73
>----------------------------------------------------------------------------------------------------------------------------------
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