[sv-bc] tokenizing time_literals

From: Greg Jaxon <Greg.Jaxon@synopsys.com>
Date: Wed Feb 17 2010 - 12:52:10 PST

Am I correct in thinking that the (2009) addition of the "1step" syntax does not
deimplement a declaration for either "tep" or "step" written as:
    wire # 1step;
?

I'd rather not believe that was ever a legal declaration, but the only support I can find for my bias is the
very general idea that SV source is a stream of tokens listed in §5.2:

The types of lexical tokens in the language are as follows:

• White space
• Comment
• Operator
• Number
• String literal
• Identifier
• Keyword

Time-literals such as "1s" are compounded of number and identifier parts ('s' is not a keyword!)
with the help of a footnote prohibiting whitespace between the parts.
So, arguably, this was never a declaration of "tep", since "s" never stood alone as a token.

But I'll betcha $50 that 9 out of 10 implementations declared a wire "step", with a net_delay of 1.

Adding  "1step" as a token was only safe under the presumption that

Numbers must be whitespace-separated from identifiers on either the right or the left,
unless special dispensation is given by some footnote.

If that is so, perhaps it needs to be stated explicitly, or else refuted with an example,
and perhaps "1step" needs to be a keyword so we won't need another footnote.

Greg Jaxon

P.S.  This concern is really about tightening the pre-processor section; I could care less about "1step".
P.P.S.  On a related note, is "assert # 0 ( 1'b1 );" a deferred immediate assertion?

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