Re: [sv-bc] Erratum and proposal in casting BNF

>And yes, $signed provides similar functionality, but because it is a
>system function, it cannot be used in a constant expression.

This is true in Verilog-2001. However, SystemVerilog is allowing $bits
to be used in constant expressions. With this precedent, I don't see
why $signed could not be allowed in constant expressions also.

There is also a proposal for 1364-2005 that $signed and other appropriate
system functions be allowed in constant expressions.

Steven Sharp
sharp@cadence.com
Received on Tue Jun 22 16:37:01 2004