[sv-bc] Re: [sv-ec] SystemVerilog 3.1A Errata And IEEE P1800 Activities

From: Alec Stanculescu <alec@fintronic.com>
Date: Fri Jul 02 2004 - 10:41:58 PDT

Vassilios,

Could you please send us reminder as to how to access the SV Bug Tracking
System that you refered to, and how to access the latest revision of
the SV-LRM?

Regards,

Alec
Received on Fri Jul 2 10:43:52 2004

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