Re: [sv-bc] Built-in types are not packed arrays

This reason the built-in types (int, shortint, etc) need to be defined
in terms of equivalent packed-array types, and allow indexes into
scalars is because they are currently legal members of packed structs.

One reason int and shortint were introduced into SystemVerilog was
compatibility with C. Having an int type fixed at 32-bits is no longer
compatible with C, but if you make the size of int variable, then
'struct packed {int A; bit signed B;} AB;' would become a implementation
dependent compiler error. And if you made it illegal to index into a
scalar, then AB[0], would also have to become illegal.

Dave

Steven Sharp wrote:

>>>Would you agree that $dimensions(byte) == 1?
>>>
>>>
>>logic foo, bar;
>>foo = bar[0];
>>
>>I'd even agree that $dimensions(logic) == infinity ;-)
>>
>>In Trenchard More's array theory this is called the "ungrounded"
>>axiom system.
>>
>>
>
>I don't know whether SystemVerilog changed this, but in Verilog it
>is illegal to index into a scalar (though some tools may improperly
>allow it anyway). That presumably "grounds" the system, and keeps
>the number of indexes that can be applied finite.
>
>Steven Sharp
>sharp@cadence.com
>
>
>
>

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