RE: [sv-bc] DataTypes: the reg datatype

>What I am suggesting is let's assume the datatype associated with a wire has
always 'logic' so that
>
>wire foo;
>
>and
>
>wire <logic> foo;
>
>have equivalent behavior. Working backwards, what effect does the logic type on
a wire object, It takes the content (value+strength) of a wire and converts it
to the legal values of a logic type when it is used in an expression.

A lot of this comes down to terminology. You describe this as converting
the content of the wire to a legal value of the logic type. I would describe
it as reading the value of the wire, which is already of the logic type.
The content consists of value and strength, and we are reading only the
value part of that content.

This matches what one normally means by the value of an object: what you
get when you read it. There may be other information that a simulator
keeps for the wire, such as values scheduled as future events on the wire,
or strengths, and those affect the simulation behavior of that wire.
However, they are not what you get when you read the wire.

There are certain built-in low-level primitives that have access to the
(value+strength) content of the wire, as do the net resolution algorithms.
Those can be regarded as special cases.

Regarding this as a conversion and special type equivalence mechanism
might indeed reduce the number of changes in the LRM. Regarding this as
the net having the data type reduces the complexity of the resulting LRM.
A lot of the extra changes will be eliminating special conversion and type
equivalence rules already complicating the LRM.

Steven Sharp
sharp@cadence.com
Received on Thu Nov 4 18:55:08 2004