Re: [sv-bc] meaning of .*

If two modules instantiated with .* connections both have a port named
DATA, but the top module has no such net are you saying that there is no
implicit wire inferred to connect the two modules?

Rich, Dave wrote:
> Isn't this text from the LRM 19.11.4 explicit?
> 
>  
> 
> "An implicit .* port connection is semantically equivalent to a default 
> .name port connection for every port declared in the instantiated 
> module. A named port connection can be mixed with a .* connection to 
> override the port connection to a different expression or to leave the 
> port unconnected.”
> 
>  
> 
> So if you didn’t use a named port, there is a .name port that would 
> create an error if there was no corresponding name to connect to.
> 
>  
> 
>  
> 
>>  -----Original Message-----
> 
>>  From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On Behalf Of Steven
> 
>>  Sharp
> 
>>  Sent: Tuesday, March 22, 2005 12:29 PM
> 
>>  To: sv-bc@eda.org
> 
>>  Subject: [sv-bc] meaning of .*
> 
>>
> 
>>  My understanding of .* was that it would only try to create a connection
> 
>>  for a port if there was a variable or net with the same name in the
> 
>>  instantiating module.  If there was a port with no corresponding variable
> 
>>  or net, it would be left unconnected.
> 
>>
> 
>>  The LRM definitely does not say this.  It says that a .name connection is
> 
>>  made for every port declared in the module.  That means that if there is
> 
>>  no corresponding variable or net where it was instantiated, there would
> 
>>  be an error.
> 
>>
> 
>>  Did I misunderstand how .* was supposed to work, or is there a major
> 
>>  defect in the LRM text?
> 
>>
> 
>>  Steven Sharp
> 
>>  sharp@cadence.com
> 
>  
>