Re: [sv-bc] Keywords

According to

   http://boydtechinc.com/btf/archive/btf_1998/0243.html

"EDA vendors" wanted to used 'config' instead of 'configuration',
as originally proposed, in order to "distinguish between Verilog
and VHDL configuration files".

For example, Jay Lawrence in 

   http://boydtechinc.com/btf/archive/btf_1998/0244.html

writes

  "Thanks, it would make my life easier as a dual-language compiler
   developer...."

According to Steven, the 'config' keyword overlaps with identifiers
in real Verilog designs.

Why not move back to 'configuration' as originally proposed and help
out the users at the expense of the compiler developers?

-- Brad

-----Original Message-----
From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org]On Behalf Of Brad
Pierce
Sent: Tuesday, April 26, 2005 1:30 PM
To: sv-bc@eda.org
Subject: Re: [sv-bc] Keywords


How about 'configuration', as in VHDL?

-- Brad

-----Original Message-----
From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org]On Behalf Of
Brophy, Dennis
Sent: Tuesday, April 26, 2005 12:00 PM
To: Clifford E. Cummings; sv-bc@eda.org
Subject: RE: [sv-bc] Keywords


Maybe instead of config-endconfig we could have beginconfig-endconfig.
That might reduce the name collisions.