RE: [sv-bc] Is member of recursive task/function hierarchically referred?

>From: "Bresticker, Shalom" <shalom.bresticker@intel.com>

>In your example, the function inc is recursive but not automatic, so it
>should be illegal.

There is nothing in the LRM making it illegal to call a static function
recursively.

Both Verilog-XL and NC-Verilog allow it.  Originally NC-Verilog did not
allow it, but at least one customer had legacy code that did it and it
managed to work anyway.  So the check was removed.

It is a very bad idea, and is unlikely to work correctly in most
situations (expecially any that needed recursion in the first place),
but it is not technically illegal.

Steven Sharp
sharp@cadence.com