[sv-bc] 4-state byte?

From: Bresticker, Shalom <shalom.bresticker_at_.....>
Date: Tue Feb 14 2006 - 02:25:29 PST
  

Hi,

Is there a reason that a 4-state equivalent of the byte data type was
not defined in SystemVerilog?

 

Thanks,

Shalom

 

Shalom Bresticker

Intel Jerusalem LAD DA

+972 2 589-6852

+972 54 721-1033

I don't represent Intel 

 



image001.gif
Received on Tue Feb 14 02:25:38 2006

This archive was generated by hypermail 2.1.8 : Tue Feb 14 2006 - 02:26:01 PST