Re: [sv-bc] Re: [sv-ec] Query regarding Macro substitution

Good catch.  Verilog Syntax 19-2 was changed in 2003 by
 
    http://www.boyd.com/1364_btf/report/full_pr/259.html
<http://www.boyd.com/1364_btf/report/full_pr/259.html> 
 
(The change was approved by VSG on 7/28/2003.)
 
Based on
 
   http://www.eda.org/sv-bc/hm/att-1043/01-BNF_reconciliation.htm
<http://www.eda.org/sv-bc/hm/1043.html> 
 
I would have thought 'text_macro_identifier" was also changed in SV
A.9.3, but according to
 
   http://www.eda-stds.org/sv/Changes_draft1/LRM_Changes_A_BNF.html
<http://www.eda-stds.org/sv/Changes_draft1/LRM_Changes_A_BNF.html> 
 
it was removed instead, probably because it's not used in the rest of
the BNF and is not mentioned in the SV LRM.  I don't remember the
history on that.  But Dan warned about an inconsistency in
 
   http://www.eda.org/sv-bc/hm/att-0699/02-review_04_07_03.htm
 
-- Brad

________________________________

From: Misustin, Randy [mailto:ram@model.com] 
Sent: Friday, August 04, 2006 12:20 AM
To: Brad Pierce; sv-bc@eda-stds.org
Subject: RE: [sv-bc] Re: [sv-ec] Query regarding Macro substitution


I believe 1364-2005 enhanced macro names to now allow escaped
identifiers. Thus:

`define \foo!  12

is now a legal macro definition of the macro name "\foo! ". If one
wishes to use such a macro in the body of another macro, that could be
accomplished in 1364-2005 by:


`define indexFoo(var) var[`\foo! ]
If I understand your proposal, you've wound up changing the meaning of
the above macro. In fact, your proposal doesn't appear to allow a direct
way to expand a macro named by an escaped identifier within another
macro.
 
-randy.

________________________________

From: owner-sv-bc@server.eda-stds.org on behalf of Brad Pierce
Sent: Thu 8/3/2006 10:05 PM
To: sv-bc@server.eda-stds.org
Subject: [sv-bc] Re: [sv-ec] Query regarding Macro substitution


Following up on http://www.eda-stds.org/sv-ec/hm/3394.html
<http://www.eda-stds.org/sv-ec/hm/3394.html>  , I have uploaded a
proposal to Mantis for item 1537
 
       http://www.eda-stds.org/svdb/bug_view_page.php?bug_id=0001537
 
A copy of the proposal is attached.
 
-- Brad