Re: [sv-bc] Case Statement Enhancement Proposal Idea

Cliff,

This is a pretty interesting idea.  I have always used the coding style 
of setting default case outputs prior to entering the case statement and 
then only apply new outputs to over ride the defaults.  Cliff has shown 
a simple code example.  In many of my designs, I may be controlling 10 
or 20 outputs from withing the case statement but only having one or two 
vary from their default values within a given case select.  By setting 
the defaults first and then over ridding these defaults, the code become 
very readable/maintainable as to which signal vary from defaults on a 
case by case basis.  I realize that this is just a coding style, but it 
is one that I have found to be extremely efficient when working with 
large case statement managing multiple outputs.  (End of soap box 
campaigning)

I am concerned by the code below.  As I noted, I find this interesting, 
but I think it would require a change to how unique works.  If I set a 
"pre-default" assignment and then not match one of the case items, do I 
still get an error ?  Oops, I mean a warning?  Unique is to "warn" me if 
I don't execute one of the case items, but if I have a "pre-default" to 
set my outputs for all case items not specified, then what is unique 
suppose to do?  This is going to require much more thought.

I wish I could be at the call on Monday - but I am going to be in the 
mountains with 50 boy scouts for the week. 

Clifford E. Cummings wrote:
...
> (1) It looks pretty silly to add an empty default to a case statement. 
> I like the following code better:
>
> always_comb begin
>   unique case ({en,a})
>     initial y = '0; // pre-default assignment
>     3'b100: y[a]='1; // updates
>     3'b101: y[a]='1;
>     3'b110: y[a]='1;
>     3'b111: y[a]='1;
>   endcase
> end
>
...
>
> Regards - Cliff
>
> ----------------------------------------------------
> Cliff Cummings - Sunburst Design, Inc.
> 14314 SW Allen Blvd., PMB 501, Beaverton, OR 97005
> Phone: 503-641-8446 / FAX: 503-641-8486
> cliffc@sunburst-design.com / www.sunburst-design.com
> Expert Verilog, SystemVerilog, Synthesis and Verification Training
-- 
==========================================================
Don Mills
mills@lcdm-eng.com
www.lcdm-eng.com
==========================================================


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