[sv-bc] udp latch table

Hi,

28.5 has this example of the UDP table for a latch:

primitive latch (q, clock, data);
output q; reg q;
input clock, data;
table
// clock data q   q+
     0    1 : ? : 1 ;
     0    0 : ? : 0 ;
     1    ? : ? : - ; // - = no change
endtable
endprimitive

The table looks wrong to me. Aren't the clock values reversed? Shouldn't
it be 

primitive latch (q, clock, data);
output q; reg q;
input clock, data;
table
// clock data q   q+
     1    1 : ? : 1 ;
     1    0 : ? : 0 ;
     0    ? : ? : - ; // - = no change
endtable
endprimitive

The RTL corresponding to a simple latch is

always_latch
	if (clk) q = data ;

Thanks,
Shalom


Shalom Bresticker
Intel Jerusalem LAD DA
+972 2 589-6852
+972 54 721-1033

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