[sv-bc] RE: [sv-ac] Support of two-dimensional interface instantiation ?

It sounds like he meant to write

>   In 1800-2005, it only supports ONE-dimensional interface
instantiation.

But that is still not correct.

The BNF is

interface_instantiation ::=
	interface_identifier [ parameter_value_assignment ]
hierarchical_instance { , hierarchical_instance } ;

hierarchical_instance ::= name_of_instance ( [ list_of_port_connections
] )

name_of_instance ::= instance_identifier { unpacked_dimension }

Thus, any number of unpacked dimensions can be added to the instance
name.

Shalom


> -----Original Message-----
> From: owner-sv-ac@server.eda.org 
> [mailto:owner-sv-ac@server.eda.org] On Behalf Of Neil Korpusik
> Sent: Saturday, December 01, 2007 3:50 AM
> To: sv-ac@server.eda.org
> Subject: [sv-ac] Support of two-dimensional interface instantiation ?
> 
> <forwarding bounced email from non-member Joseph Lu>
> 
> 
> Subject: [sv-bc] Support of two-dimensional interface instantiation ?
> Date: Fri, 30 Nov 2007 12:32:05 -0800
> From: "Joseph Lu" <JLU@altera.com>
> To: <sv-bc@server.eda.org>
> Cc: <sv-ac@server.eda.org>
> 
> 
> 
> Hi,
> 
>   In 1800-2005, it only supports two-dimensional interface 
> instantiation.
>   Will 1800-2008 support two-dimensional interface instantiation?
>   This feature is very commonly used to model array processor and FPGA
>   architectures in which a system is composed of many similar building
>   blocks. Each building block is identified by two indexes.
> 
> 
>   For example,
> 
>     Interface array_cup_bus (input a, inout b, input clk);
>       Inout data;
>       Input r_w;
>     endinterface: array_cup_bus
> 
>     module cup (array_cup_bus cup_bus);
> 
>     endmodule
> 
>     module mem (array_cup_bus cup_bus);
> 
>     endmoudle
> 
>     module array_cup (input a, inout b, input clk);
> 
>        array_cup_bus cup_bus [1:3][1:3] (a, b, clk);
> 
>        cpu cpu1(cpu_bus[1][1]);
>        mem mem1(cpu_bus[1][1]);
>        cpu cpu1(cpu_bus[1][2]);
>        mem mem1(cpu_bus[1][2]);
>        cpu cpu1(cpu_bus[1][3]);
>        mem mem1(cpu_bus[1][3]);
> 
>     endmoudle
> 
> 
> 
> Thanks,
> Joseph Lu, Ph.D.
> IC Design & Verification Manager
> Altera Corp.
> 101 Innovation Dr.
> San Jose, CA95134
> Tel:408-5448694
> Email:jlu@altera.com
> =20
> 
> 
> 
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