>From: "Brad Pierce" <Brad.Pierce@synopsys.com> >Are you saying that port declarations like > > module test(input int i, output o); > endmodule > >were illegal in IEEE Std 1800-2005? Yes. This was discussed when the text was approved, because of concerns with backward compatibility with the previous Accellera LRM. >Do any existing tools really error on this? We allow it, with at most a warning, because of the potential backward compatibility issue. I think we may treat it as a 2-state net, with semantics of our own devising, rather than as a variable. Steven Sharp sharp@cadence.com -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Mon Dec 17 07:47:56 2007
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