Subject: addition for intro of systemverilog3.0 document
From: Simon Davidmann (simond@co-design.com)
Date: Mon Dec 10 2001 - 07:07:41 PST
As per the last meeting, here is my suggestion for an addition to the
introduction of the systemVerilog document.
As discussed, the idea was to give some credit in the document for the
development and the donation.
replace first sentence with this paragraph:
"This document specifies the Accellera extensions for a higher level of
abstraction for modeling and verification with the Verilog Hardware
Description Language. Much of the syntax and semantics in these extensions
are part of the SUPERLOG Extended Synthesis Subset (ESS) donation made to
Accellera by Co-Design Automation, Inc and proven with their products.
SUPERLOG was developed by Peter Flake and Simon Davidmann to extend Verilog
into the systems space and the verification space and was built on top of
the work of the IEEE Verilog 2001 committee."
Simon
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